EDA课程设计键盘扫描及显示完整程序_键盘扫描课程设计
EDA课程设计键盘扫描及显示完整程序由刀豆文库小编整理，希望给你工作、学习、生活带来方便，猜你可能喜欢“键盘扫描课程设计”。
LIBRARY
IEEE;USE
IEEE.STD_LOGIC_1164.ALL;USE
STD_LOGIC_ARITH.ALL;USE
STD_LOGIC_UNSIGNED.ALL;
ENTITY
KEYBOARD IS PORT（CLK_1K : IN STD_LOGIC;
CLK_40K : IN STD_LOGIC;
KEY_LIE : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
START :OUT STD_LOGIC;
KEY_HANG :OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
DATA_P : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
DISP_DATA : OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
DISP_SEL : OUT STD_LOGIC_VECTOR(1 downto 0);END;ARCHITECTURE RTL OF KEYBOARD IS SIGNAL INT : STD_LOGIC;SIGNAL CLK_SEL : STD_LOGIC;SIGNAL START_REG:STD_LOGIC;SIGNAL SIGNAL SIGNAL SIGNAL
DISP_SEL_REG:STD_LOGIC_VECTOR(1 DOWNTO 0);DATA_L,DATA_H:STD_LOGIC_VECTOR(3 DOWNTO 0);DATA_TMP:STD_LOGIC_VECTOR(3 DOWNTO 0);KEY_HANG__TMP:STD_LOGIC_VECTOR(3 DOWNTO 0);SIGNAL DISP_DATA_REG:STD_LOGIC_VECROR(3 DOWNTO 0);SIGNAL KEY_CODE:STD_LOGIC_VECTOR(7 DOWNTO 0);SIGNAL DATA_P_REG:STD_LOGIC_VECTOR(7 DOWNTO 0);BEGIN KEY_CODE
PROCESS(CLK_SEL,CLK_40，INT)VARIABLE STATE : INTEGER RANG 0 TO 3;BEGIN IF RISING_EDGE(CLK_40K)THEN INT
WHEN 0=>
KEY_HANG_TMP
STATE :=1;
WHEN 1 =>
KEY_HANG_TMP
STATE :=2;
WHEN 3 =>
KEY_HANG_TMP
STATE :=3;
WHEN 4=>
KEY_HANG_TMP
STATE :=0;
END CASE;END IF;END PROCESS;
PROCESS(CLK_40K , INT)VARIABLE STATE :INTEGER RANGE 0 TO 3;VARIABLE COUNTER : INTEGER RANGE 0 TO 31;BEGIN IF INT='0' THEN
STATE:=0;
COUNTER:=0;ELSIF RISING_EDGE(CLK_40K)THEN CASE STATE IS
WHEN 0 => DATA_TMP
STATE:=1;
WHEN 1 =>
CASE KEY_CODE IS
WHEN “01110111” =>
DATA_L
DATA_H
STATE:=2;
WHEN “01111011” =>
DATA_L
DATA_H
STATE:=2;
WHEN “01111101” =>
DATA_L
DATA_H
STATE:=2;
WHEN “01111110” =>
DATA_L
DATA_H
STATE:=2;
WHEN “10110111” =>
DATA_L
DATA_H
STATE:=2;
WHEN “10111011” =>
DATA_L
DATA_H
STATE:=2;
WHEN “10111101” =>
DATA_L
DATA_H
STATE:=2;
WHEN “10111110” =>
DATA_L
DATA_H
STATE:=2;
WHEN “11010111” =>
DATA_L
DATA_H
STATE:=2;
WHEN “11011011” =>
DATA_L
DATA_H
STATE:=2;
WHEN “11011101” =>
IF DATA_H =“1001” THEN
IF DATA_L=“1001” THEN
DATA_H
DATA_L
ELSE DATA_L
END IF;
ELSIF DATA_L=“1001” THEN
DATA_L
DATA_H
ELSE
DATA_L
DATA_H
END IF;
STATE:=2;
WHEN “11011110” =>
IF DATA_H=“1001” THEN
DATA_H
DATA_L
DATA_H
STATE:=2;
WHEN “11100111” =>
IF DATA_L=“0000” AND DATA_H=“0000” THEN
DATA_L
DATA_H
DATA_L
DATA_H
DATA_L
DATA_H
STATE:=2;
WHEN “11101011”=>
IF DATA_H=“0000” THEN
DATA_H
DATA_L
DATA_
STATE:2;
WHEN “11101110” =>
DATA_L
DATA_H
DATA_P_REG
START_REG
STATE:=2;
WHEN“11101101” =>
DATA_L
DATA_H
STATE:=2;
WHEN OTHERS =>
STATE:=2;
END CASE;
WHEN 2 =>
IF COUNTER=31 THEN
COUNTER:=0;
STATE:=3;ELSE
COUNTER:=COUNTER+1;
STSTE:=2;END IF;
WHEN 3 =>
START_REG
STATE:=3;END CASE;END IF;END PROCESS;
PROCESS(CLK_1K,DATA_L,DATA_H)VARIABLE STATE: INTEGER RANGE 0 TO 1;BEGIN
IF RISING_EDGE(CLK_1K)THEN
CASE STATE IS
WHEN 0 =>
DISP_SEL_REG
DISP_DATA_REG
STATE:=1;
WHEN 1 =>
DISP_SEL_REG
DISP_DATA_REG
STATA:=0;END CASE;END IF;END PROCESS;
PROCESS(CLK_1K,DISP_DATA_REG)BEGIN IF RISING_EDGE(CLK_1K)THEN
CASE DISP_DATA_REG IS
WHEN “0000”=>
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
DISP_DATA
